1

Тема: max7219 - 7 сегментный индикатор

#define DIN PD2
#define CS  PD3
#define CLK PD4

long x;

void setup() {
  DDRD |= (1 << DIN) | (1 << CS) | (1 << CLK);
  PORTD |= (1 << CS);
  PORTD &= ~(1 << CLK) | (1 << DIN);
  delay(1);

  WriteBit16(0x0F,0x00); // Тест выкл.
  WriteBit16(0x0C,0x01); // Вкл. индик.
  WriteBit16(0x0B,0x07); // кол-во разрядов
  WriteBit16(0x09,0xFF); // Дешифраторы вкл.
  WriteBit16(0x0A,0x00); // яркость
}

void loop() {

  dec(x++); 
delay(100);
}

void dec(long decimal){
  WriteBit16(0x08,decimal/10000000);
  WriteBit16(0x07,decimal/1000000%10);
  WriteBit16(0x06,decimal/100000%10);
  WriteBit16(0x05,decimal/10000%10);
  WriteBit16(0x04,decimal/1000%10);
  WriteBit16(0x03,decimal/100%10);
  WriteBit16(0x02,decimal/10%10);
  WriteBit16(0x01,decimal%10);
  }

void WriteBit16(byte reg, byte data){  
     PORTD &= ~(1 << CLK);PORTD &= ~(1 << CS);
     for(int i = 7; i >= 0; i--){
        if(((reg >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     for(int i = 7; i >= 0; i--){
        if(((data >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     PORTD |=(1 << CS);PORTD &= ~(1 << CLK);PORTD &= ~(1 << DIN);
  }  

2

Re: max7219 - 7 сегментный индикатор

Attiny 2313 частотомер 9МГц

#define DIN PD2
#define CS  PD3
#define CLK PD4
#define T1  PD5

volatile int x;
unsigned int timer0;
float f;
float pop_k = 0.996237;

void setup() {
  DDRD |= (1 << DIN) | (1 << CS) | (1 << CLK);
  PORTD |= (1 << CS);
  PORTD &= ~(1 << CLK) | (1 << DIN);
  PORTD |= (1 << T1);

  WriteBit16(0x0F,0x00); // Тест выкл.
  WriteBit16(0x0C,0x01); // Вкл. индик.
  WriteBit16(0x0B,0x07); // кол-во разрядов
  WriteBit16(0x09,0xFF); // Дешифраторы вкл.
  WriteBit16(0x0A,0x04); // яркость
     cli(); 
// TIMER1    
  TCCR1A = 0;
  TCCR1B = 0;
  TCCR1B = (1 << CS12)|(1 << CS11)|(1 << CS10); 
  TIMSK |= (1 << TOIE1); 
// TIMER0
  TCCR0A = 0;   
  TCCR0B = 0;   
  OCR0A = 250;
  TCCR0A |= (1 << WGM01); 
  TCCR0B |= (1 << CS01);  
  TIMSK |= (1 << OCIE0A);  
   sei(); 
}

void loop() {}

void dec(long decimal){
  WriteBit16(0x08,15);
  WriteBit16(0x07,decimal/1000000%10+0x80);
  WriteBit16(0x06,decimal/100000%10);
  WriteBit16(0x05,decimal/10000%10);
  WriteBit16(0x04,decimal/1000%10+0x80);
  WriteBit16(0x03,decimal/100%10);
  WriteBit16(0x02,decimal/10%10);
  WriteBit16(0x01,decimal%10);
  }

void WriteBit16(byte reg, byte data){  
     PORTD &= ~(1 << CLK);PORTD &= ~(1 << CS);
     for(int i = 7; i >= 0; i--){
        if(((reg >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     for(int i = 7; i >= 0; i--){
        if(((data >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     PORTD |=(1 << CS);PORTD &= ~(1 << CLK);PORTD &= ~(1 << DIN);
  }  


ISR(TIMER0_COMPA_vect){
    timer0++;
  if(timer0 == 1){
    x = 0;TCNT1 = 0;
     TCCR1B = (1 << CS12)|(1 << CS11)|(1 << CS10);}
  if(timer0 == 10001){
     TCCR1B &= ~(1 << CS12)|(1 << CS11)|(1 << CS10); 
     f = ((x * 65535) + TCNT1)*pop_k; dec(f); timer0 = 0; }
  }  

ISR (TIMER1_OVF_vect){x++;}

3

Re: max7219 - 7 сегментный индикатор

тест

#define DIN PD2
#define CS  PD3
#define CLK PD4

void setup() {
  DDRD |= (1 << DIN) | (1 << CS) | (1 << CLK);
  PORTD |= (1 << CS);
  PORTD &= ~(1 << CLK) | (1 << DIN);

  WriteBit16(0x0F,0x00); // Тест выкл.
  WriteBit16(0x0C,0x01); // Вкл. индик.
  WriteBit16(0x0B,0x07); // кол-во разрядов
  WriteBit16(0x09,0xFF); // Дешифраторы вкл.
  WriteBit16(0x0A,0x04); // яркость
}

void loop() {
  dec(12345678);
  }

void dec(long decimal){
  WriteBit16(0x08,decimal/10000000);
  WriteBit16(0x07,decimal/1000000%10);
  WriteBit16(0x06,decimal/100000%10);
  WriteBit16(0x05,decimal/10000%10);
  WriteBit16(0x04,decimal/1000%10);
  WriteBit16(0x03,decimal/100%10);
  WriteBit16(0x02,decimal/10%10);
  WriteBit16(0x01,decimal%10);
  }

void WriteBit16(byte reg, byte data){  
     PORTD &= ~(1 << CLK);PORTD &= ~(1 << CS);
     for(int i = 7; i >= 0; i--){
        if(((reg >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     for(int i = 7; i >= 0; i--){
        if(((data >> i) & 1) == 1){PORTD |= (1 << DIN);}else{PORTD &= ~(1 << DIN);}
        PORTD |=(1 << CLK);PORTD &= ~(1 << CLK);
        }
     PORTD |=(1 << CS);PORTD &= ~(1 << CLK);PORTD &= ~(1 << DIN);
  }